AVS2003 Session MS-WeM: Sensors, Metrology, and Control

Wednesday, November 5, 2003 8:20 AM in Room 326

Wednesday Morning

Time Period WeM Sessions | Abstract Timeline | Topic MS Sessions | Time Periods | Topics | AVS2003 Schedule

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8:20 AM MS-WeM-1 Critical Dimension and Remaining Film Thickness Within Wafer Uniformity Improvement by Advanced Process Control Based on Optical Integrated Metrology
J. Luque, G.P. Kota, V. Vahedi (Lam Research Corporation)
The first generation of advanced process control using integrated metrology in polysilicon etch processes has been focused on correcting wafer averaged critical dimension (CD). Schemes have ranged from feed-forward to feed-forward/feedback closed loop control. In all these cases the information from optical CD is used to obtain a target wafer averaged CD and minimize the lot-to-lot and within lot- variations of post-etch CD by correcting perturbations from lithography and etch steps. In the present work we explore some of the cases where improvement of isolated to dense loading, within wafer CD uniformity after gate etch or uniformity of the remaining films in recess etch applications is important. Because device performance is directly related to the CD, it is necessary to improve the uniformity of the CDs as much as is important to reach the specific target CD. Correction of the CD within wafer uniformity can be achieved by feedback of the CD information to the track/scanner cluster (litho step) or by feed-forward to the etch module. We show how non-uniformities generated in a concentric pattern by the litho step can be partially or completely eliminated during the etch step using a tunable temperature gradient in the chuck of a Lam Versys 2300 etching system. This approach to improve CD uniformity opens a path to more complex advanced process control that will deliver simultaneous CD and uniformity control. The results from this method should be better than those from schemes based on just averaged CD control. Similar approach is investigated in etch processes that can be characterized by simple thin film measurement instead of full optical profile characterization.
8:40 AM MS-WeM-2 Real-time In-situ Chemical Sensing in GaN MOCVD for Advanced Process Control
S. Cho, G.W. Rubloff (University of Maryland); M.E. Aumer, D.B. Thomson, D.P. Partlow (Northrop Grumman Corporation)
Gallium nitride is a strong candidate material for next generation semiconductor devices for high frequency, high power electronic applications. Despite the potential of this material, the industry has yet to realize a systematic methodology for reproducible manufacturing at the high performance levels envisioned. As a joint project between the University of Maryland and Northrop Grumman, we have addressed this challenge with the use of a real-time in-situ chemical sensing technique. Residual gas analysis downstream to the MOCVD process has enabled us to monitor in real-time the by-product species due to the deposition reaction as well as other background impurity species inherent to the process. A metric derived from the by-product signals provided us with a real-time means for accurately predicting the crystal quality of the material as determined by the post-process ex-situ XRD (X-ray Diffraction) with an average uncertainty of 5% or less. Background impurity levels in the gas-phase were also closely correlated to the post-process ex-situ PL (Photoluminesence) measurements for material quality. In addition, time-integration of the by-product signals during the deposition process generated metrology for predicting and controlling the thickness of the individual layers in the GaN-based HFET structure. This creates opportunities for advanced process control based on real-time in-situ sensing, with the promise of major benefit in reproducibility and cost reduction in GaN-based semiconductor manufacturing.
9:00 AM MS-WeM-3 Flexible Simulation Tools for Design, Control, and Optimzation of Semiconductor Processing Systems
R.A. Adomaitis (University of Maryland)
Physically based simulations are valuable tools for understanding the chemical and physical mechanisms responsible for spatial non-uniformities in films produced by chemical vapor deposition systems. In this talk, an alternative will be presented to the "traditional" (e.g., CFD-based) approaches to high-fidelity equipment simulation. This work was motivated by the need for flexible simulation tools that allow rapid evaluation of reactor design choices and that interface readily with available optimization, process control, and numerical analysis tools. An object-oriented framework was created to generate modular simulation elements corresponding to CVD reactor physical components, as well as simulator elements derived from the abstraction of boundary-value problem based model solution (global spectral) methods and the other numerical methods necessary to solve the nonlinear equation models. The role of information technology issues and distributed computing concepts in implementing this framework will be presented. Results of our simulation-based design and prototype testing of the Programmable Chemical Vapor Deposition reactor system, a highly-controllable CVD system under development at UMd, and our interaction in redesigning CVD systems with an industrial research partner will be discussed. It will be shown that the flexibility built in to the simulation methodology from the outset is critical to enabling a relatively rapid simulation/experimental-evaluation/redesign cycle in these CVD reactor design and construction projects.
9:40 AM MS-WeM-5 Spatial Uniformity as a Key Challenge in Semiconductor Process Control
D.S. Boning (Massachusetts Institute of Technology)
Semiconductor process control has advanced to address manufacturing needs -- primarily wafer to wafer uniformity of device and interconnect structures -- using improved metrology, real-time, and run-by-run control techniques. Here, the need for improved spatial uniformity is discussed, and the challenges for advanced process control in achieving these needs outlined. First, the impact of variation on integrated circuits of wafer to wafer, within wafer, and within die variation is considered, highlighting that yield and performance can depend at least as strongly on spatial uniformity as on wafer to wafer uniformity. Within die uniformity in particular pose difficult challenges; examples include uniformity in interconnect geometry (e.g. pattern dependent CMP and plating effects such as copper dishing and erosion), as well as device geometry and electrical properties (e.g. channel length variation due to lithography and plasma etch pattern dependencies). Finally, the resulting needs and challenges for process control are discussed: metrology must evolve to enable observation of within die variations, models are needed to relate control parameters to within die as well as across wafer results, and algorithms are needed that can address both spatial and temporal variation objectives.
10:20 AM MS-WeM-7 In-situ Defect Metrics Based on Real-Time Sensor Integration and Analysis
J.A. Mucha (INFICON, Inc.)
The concept of advanced metrology is not new to the semiconductor industry. However, the focus of attention always seems to be on increasing the capabilities of visual inspection for defects even though yield-affecting defects include non-visible electrical defects, parametric defects and electrical faults whose root cause is often difficult to determine. The "2001 SIA International Roadmap for Semiconductors: Yield Enhancement" notes that current Data Management Systems (DMS) have limited abilities to incorporate real-time in-situ sensor data that can be correlated with lot and wafer-based data. Further, current DMS are even more limited in their abilities to use the information in a yield-predictive way in spite of the fact that real-time analysis of such data would result in more rapid identification and prioritization of defect generating mechanisms to a broad sector of engineering group. In this presentation, the sensor-integration and analysis system, FabGuardâ, is used to address these shortcomings by combining sensor output with logic and signal analysis to create real-time in-situ metrics for wafer health. These can then be used to track potential non-visible yield-loss defects in a way that can drive continuous product improvement with decreased emphasis on in-line and ex-situ metrology. The use of residual gas analysis in monitoring the degas operation in PVD cluster tools is shown to be a capable for generating metrics that sensitive to process variations exhibited by prior processing equipment such as etch, ash and CVD. Case studies of applying this metrology are presented that identify root causes of contamination-induced yield-limiting defect mechanisms.
10:40 AM MS-WeM-8 Prototype Development of Four-Point Probe with 100 µm Probe-Spacing for Resistivity Measurements
M. Suzuki, Y. Sato, T. Ogiwara (NTT-AT, Japan); S. Kiyota, K. Watanabe (Kiyota Manufacturing Co., Japan); N. Matsubayashi (AIST, Japan); S. Matsumoto (Keio University, Japan)
The four-point probe technique has been used commonly to measure the semiconductor resistivity. It is, however, difficult to detect changes in resistivities over distances smaller than 3 mm because of the standard probe-spacing of 1 mm. With the reduced dimension of devices, it is very significant to determine resistivity variations on a very small scale. Thus we have developed the prototype of the four-point probe with 100 µm probe-spacing and confirmed the adaptability for practical use. The four probes are made from 50-µm-diameter tungsten carbide wire, and their apexes are ground down to a radius of 20 µm. It is found that the tip apex is durable and is not contaminated after 1.5 x 105 times probing onto the Si surface. The measurement system is constructed with mechanical driving parts, a commercial dc current source, and a digital voltage meter under the design concept same as the conventional four-point probe technique. We have demonstrated that it is possible to measure the resistivity radially across a Si wafer very near the wafer edge (about 0.5 mm), while conventional system with 1 mm probe-spacing was limited to measure the resistivity to the points of about 4 mm from the wafer edge. This 100-µm probe can also measure the resistivity in the phosphorus-doped poly-silicon film of 0.5 x 0.5 mm2 on an oxidized Si wafer. Our results suggest that the probe can measure a resistivity distribution on one LSI chip area, and that this system will be used as a monitoring tool for various fabrication processes. This project was performed with the financial support of Ministry of Economy, Trade, and Industry, Japan.
Time Period WeM Sessions | Abstract Timeline | Topic MS Sessions | Time Periods | Topics | AVS2003 Schedule